question about lv gate
hi,i am learning uer-written model .when i write program about" st6b" model ,i meet a "lv gate "and "hv gate ".I don't know it's implication and how it works .Any help will be appreciated.Thanks
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1 answer
It stands for low value and high value gate. The output will be set to the lowest or the highest value of the two input signals. It is equivalent to MIN and MAX funktion.
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Asked: 2015-09-28 02:30:10 -0500
Seen: 3,202 times
Last updated: Oct 03 '16
