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2020-05-27 13:29:00 -0500 | asked a question | iec transformer impedance correction factor in thevenin impedance calculation Please, can someone help me understand what the impedance correction iec factor the psse uses to calculate the zero sequence thevenin impedance. using a theoretical system of only one generator (with impedance equal to zero) and a delta-wye grounded transformer, a short circuit In high side (wye side) in the ascc method the zero sequence thevenin impedance is equal to zero sequence impedance of transformer on the wye side but in the iec method, thevenin impedance is different. I tried using the formula kt = 0.95.cmax / 1 + 0.6xt but the result does not match. thank you |
2020-05-22 02:28:52 -0500 | commented answer | In line fault Thank you very much |
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2020-05-12 16:07:15 -0500 | answered a question | In line fault Thank you People like me who like show results In diagram Im thinking of create a Python script to insert a dummy bus automatically Is possible? |
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2020-05-09 15:44:48 -0500 | commented question | Suggestions on PSS/E topics congratulations for the initiative very good we are waiting for new tutorials and we will spread it to more people |
2020-05-09 13:41:04 -0500 | asked a question | In line fault Hello Does ASCC not do in line fault? only does scmu do in line fault? how to show the scmu results in the diagram? how can I represent an in line fault in the diagram? |