Applying a SLG fault with delayed clearing

answered 2016-11-24 15:08:11 -0600

oppossumX
40 ●2 ●4 ●7

updated 2016-11-24 15:10:00 -0600

Hi, what about the distspcbfault_2 function? It looks like it has breaker opening capabilities but I am not sure if it would suit your application exactly.

Chapter 11.7 of the PSSE 33.9 PAGV1 gives some example of it's use in a SLG fault with single pole tripping without using dummy busses to open the near and far end breakers using different clearing times.

answered 2016-11-21 17:14:12 -0600

perolofl
3322 ●1 ●8 ●18

updated 2016-11-23 03:34:33 -0600

Solving this without a dummy bus is a little tricky, even PSS/E uses a dummy bus to calculate open end line faults in short circuit module!

If you still want to do it without a dummy bus you might do something like this:

1. Apply the SLG with an equivalent positive sequence shunt at side B of the line.
2. Run for 6 cycles. Clear the fault and disconnect the line.
3. Apply an equivalent positive sequence shunt at side A of the line. (corresponding to the effect of the real fault at side B of the line, with line breaker at B open)
4. Run for 3 cycles.

5. Clear the fault.

   The tricky thing is to calculate the fault shunt in step 3 above.

EDIT: Perform the simulation in the following way by using a dummy bus:

Do the following.

1: Do LTAP and place the dummy bus at From bus line end.

2: Start simulation, run to x seconds and add LG fault at Dummy bus.

3: Simulate for 6 cycles.

4: Clear fault.

5: Trip line from Dummy to From bus.

6: Apply LG fault at Dummy bus (new calculation of equivalent shunt with line open-end will be done)

6: Run for 3 cycles.

7: Disconnect Dummy bus.

8: Run to x seconds.